Computer control circuitry



Sept. 29, 1959 Filed NOV.` 16, 1956 C. W. USKAVITCH COMPUTER CONTROL CIRCUITRY 4 Sheets-Sheet 1 v Sept. 29, 1959 c. w. 'uKAviTcH COMPUTER CONTROL CIRCUITRY Filed NOV. 16, 1956 4 Sheets-Sheet 2 .I||,|U\u .S H y f .WJWIMW w. R m\\\ mwah T .kxw WM w W A v w m W wkbi Y ....II. s Q www@ Sept. 29, 1959 c. w. UsKAvlTcH COMPUTER CONTROL CIRCUITRY Filed Nov. 16. 1956 4 Sheets-Sheet 3 n r wwnk Rm .Wm Qk w v xwh mw N\\ ma, ||||I. |I x\-\\k\\s w L? w w M m\\\ wb .Nxm a v. I Q@.SQR B A V Q@wf 1A Nk* n r m@ $5 .E Qwwks M\\ Y..l\ .WMWWk .n

Sept. 29, 1959 c. w. usKAvlTcH COMPUTER CONTROL CIRCUITRY 4 Sheets-Sheet 4 Filed NOV. 16, 1956 United *Seres Parent O 2,907,027 fCQMIfUTER CGNTRGL CIRCUIT-RY (gllau'ence W. Uskavitcm Lexington, fMass.,` assignor `to ,the- UnitedStates ofAmerica as represented by the Secretary of thevAitr Force l Application November 16, 1956, serial No. 622,720`

' is (crans-17.1)

The invention described-herein may be manufactured andused byor :for 'the uited States Government Lfor governmenta'l purposes without payment to 'me of royalty thereon. t t t Y Thefpresentiinvention relates to computing and `particularly-lto:methodsgandapparatus tor utilization of computing techniques for the purpose;'of 'controlling signal re-VV ception inflectronics communication'systems.' Y

IIn -a radarsystem, because the amplitude o'f the video noise from ithe receiver varies, it is most desirable ltohave some means whereby ythe quantizednoise,,and'consequentlyfthefjvideonoise `is` maintained substantially constant, even though the video noise level 'from radarlre'ceivermay vary. Y

"One practical `application 'ofthe computer control circuitry 'of 'my present invention ifs shown herein .asl an automatic lipcontrol for the video noise'level in av radar system. 3 'Itis'the purpose of such anautornjatic clipconufolltot'preveut the video from being 'Clllpdftoo high, thereby retaining Weak targets, or from beingclipped too low,`thereby avoiding'overloadof'thevideo with noise.

In more -speciiic itermsgthe present.inventionrelates 'to computer control circuitry including a clipper-quantizer circuitry for converting' analoguefvideo data to digital pulses, and VVfinally "feedingback said 'digital pulses 'to reguf late the clip level ofthe subsequently received analogue videodata.

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r2 which make up the quantizer, as shown schematically in Fig. l;

Fig. V3 illustrates graphically jthe nature of the `Waveshapes -output signals, as plotted against time, of several of the components, of the block diagramof-Fig. 1';

Fig. 4 :illustrates graphically the nature of the waive- Y shapes of output signals as plotted against "time, of some As is well known in the art, radar systems are subject t to amplitude rvvariations due jtoga multiplicity of factors, such as localfoscillator changes, `crystal current changes, andchanges "in receiver gain. Since these factors 4cannot be easllyeliminated,'the'automatic clip control of my `presentv invention changes the clip vlevel in such a way that the quantized noise and, consequently, the video noise is-maintained constant, asfnearly as possible, withiluctuations in the video noise level. Y

lOne feature of the present invention is unique computer circuitry wherebyivideo analogue data is converted to'digitalpulses, which in turn regulates subsequently received video analogue data, Vin accordance withv the character of thepreviouslyreceivedvideo analogue data.

Another feature of the Apresent invention is computer control circuitry provided with a clipper component for converting the clipped video analogue data to digital pulses and tinally regulator means for regulating the clipping levelof subsequently received input video. analogue data in ,accordancewith the frequency of said digital pulses.

l The present invention itself, both as to its organization and manner of operation, togetherwith further features and advantages thereof, may lbest be understood `byreference to thefollowing description taken in connection` with 'the' accompanying drawings in which:

, Fig. l lis a schematicblock diagram of the components which make up the computercontrol circuitry, as used as anfautomaticlclip .control, in -conjunction witha radar system; y

. :Eigi 2 -lis fa yschenattriti@block'diagramofthe components of the same wave-shapes'as shownin Fig. 3,1but oua con? dense'd time scale, vas well as Vwaveshap'es of output 'sig nals of'ot'her components of Fig. l; and

Fig. 5 isa part circuit'andpart block diagram of allthe components which make up the'automatic .clip control, 'as shown in block form in Fig. l.

IIn theV automatic clip control circuit for a radar system, `video input 110 signals are lapplied at 10, as shown in Fig. l, to the clippercomponent 11. VSaid videoinput signals 110 which are a-composite of noises and desirable signals, areshown in graph (b), in Fig. 3.

After ith'e -clipper v'component 11 :clips lthe video "input signals 11"0 tothe clipflevel *11151, as regulated by circuitry as will be later described, the 4clipped video'willft'ake the wave "form of l'graph ,'(c). -r[he `clipped video is then ap'- pliedlt'o thequantizerf13.

The :quantizer 13 'produces 'output pulses 113, shown in graph (d) of Fig. '3, vfor 'cach clipped, peak 112, as shownn graph '(c). The compon'erlts ofthe quantizer 1B, shoWninfFig. 2, include `an'ampliier -30 anda cath.- ode follower S1 which amplies andinverts, respectively, the clipped video :from clipper 11jto provide positive triggeringio'f a ilip-llopSZ. Agate 33, receives through oneof lits gidsftiming mark pulses 134frompul'ser`34, which Vare spaced every 6p seconds, as shown fin Fig. 3, graphtu). *By'positively triggering llip-llop 3.2, gate 33 will 4'open' and permit the next timing mark pulse 134 through. IEachtiniing mark pulse 134 whichggets through the gate is `delayed 2,wseconds `by delay line'35 and then is regenerated by means of a blocking oscillator 36. vThe output of blocking oscillator 36 then Will takefthe form of the 'quantized 1video pulses 1l13as shownlin graph `(l) o`f`Fig. 3. The `quantized video pulses 113jalso`are fed back through line -37 to reset 4dip-'flop 32, sothat :'sai'd ilip-llo'p B2i-may be ready for another positive triggering action. Y .Y l

'The' quantizcd 'video pulses `113 then Yare transmitted to a conventional 4radar-scope, or other 'video display apparatus, indicated vby "block l13min Figs. l Vand 5, "for visual evaluation, -as `well as lto grid 1 of 'a`tube "Vfl of gate 14, as shown in Fig. V5. In the present 'embodi-- menta 7AK7 gate tube is usedfor V1, however another tube lof similar characteristics may be used. The 'qua'ne tized 1video pulses 4113 `are then gated by a range delay multivibrator r"16 and gate delay multivibrator 17; n

The range-delay-multivibrator `16is fed by Ja'p'o'sitive radar trigger -input pulse115every 700,u. seconds at 1"5, as shown in Figs. `l andf4`(i). It is noted that ithe time scale of Fig. 4 has been considerably condensed, as comparedtto Fig. 3, because the duration Iand spacing ofthe'pulses thereon v'are -for considerably longerinter'valsl oftime thangthe'pulses shown -in Fig. 3*.)

' The irange' delay multivibrator 16 delivers range pulses 1'1'6, as Ishown on Fig. '3 graph (e')-`and Fig.` 4, "grapli` (k), atf'SOOp. seconds intervals (depending `upon the' setting of -the -clip level multivibrator? 1t/8, as subsequently will be more fully described-X Each rangepul'se 11'6 jis transmitted to the gate multivibrator 17, which initiatesV a gate multivibrator pulse 117, .of 8p secondseducation,` as shown Vvin fFig.' 3(71) and Fig. 41(1). Theoutputpulses 3 f Y, from the plate of tube VI of gate 14, through the transformer T1 for inversion, and finally said pulse 114 will trigger clip level multivibrator 18, as shown in Figs. 1, 3(g) and 4(k) and 5. Y

Upon triggering clip level multivibrator 18 with a pulse 114from gate 14, a clip level multivibrator pulse 119, roughly of the order of 500# seconds duration, depending upon the setting of the clip level multivibrator 18, will occur on the average. The clip level multivibrator pulses will occur every 70001. seconds or one every ten radar triggers. It is noted in Fig. 4, that for convenience of illustration, live radar triggers 115 are shown for each clip level multivibrator pulse 119, however, a ten to one ratio, of triggers 115 to pulses 119, is preferred on the average and is determined by the clip level setting in this particular application. The positive output pulses 118 of multivibrator 18 are fed to inverter and amplifier stage 19 which restores pulses 118 to their original phase, as well as amplies said pulses 118 by means of a 6SN7-GTA tube, designated as V2 in Fig. 5. o

vThe output of stage 19 is applied as pulses 119 to theintegrator 20, as shown in Fig. l, where said pulses are integrated using a 20 seconds time constant.- The integration produces a D.C. voltage 120, as seen in Fig. 4(0), is roughly proportional to the frequency of the quantized noise pulses 113, and said D.C. voltage 120 volts.

from to ,-70 volts; and amplifier output, from -250 to +300 volts.

As shown in Fig. 5, the amplifier output is clamped to approximately 2.0 volts, by means of clamping stage 12 including a 6W4 diode, designated as tube V3 before being integrated. This procedure makes the integrated output signals 120, as seen from the output of the cathodefollower clipper, the correct magnitude for clipping the video input 110 when the output of the clip-level multivibrator 18 is adjusted. The 6W4 diodeis used for this purpose because Vof the high inverse plate and heater cathode voltage involved, which is in the order of 550 As can be seen in Fig. 5, the integrator 20 comprises a simple RC filter including resistor 60 and capacitor 61, which feeds into the grid of cathode follower comprising half of double triode tube 6SN7. Tube 6SN7 is designated as V4 in Fig. 5. No grid resistor can be placed across the capacitor 61 (nor can an electrolytic capacitor be used) because of the increased discharge and subsequent loss of gain. A y e The clipper 11 comprises two IN34A`clipping diodes,

v v designated as 63 and 64, and said diodes arev terminated ina 5100 ohm resistor 65, the value of which is deteris fed back to the clipper 11 to regulate the clip level 111 of subsequently received video input signals.

The inverter and amplifier stage 19, as shown in Fig. 5, have been designed to provide the maximum amount of gain in the feedback path comprising clipper 11, quantizer 13, gate 14, clip level multivibrator 1,8, amplifier and inverter stage 19, integrator 20 and back to clipper 11. In a preliminary study, a D.C. amplier was used to amplify directly the integrated output of the delay clip level multivibrator 18, without resorting to other ampliiication; however, amplification of the output of multivibrator 18 before integration was considered more desirable.

To obtain the necessary gain the clip level multivibrator output pulses 118 must be amplified to pulses of at least 500 volts in amplitude. Consequently, the amplilier of stage 19 used a 60G-volt plate supply, or as shown in Fig. 5, +300-volts at 51 on the plate of the amplifier component of stage 19 and -300volts on the cathode of said component. In addition, only 75K ohms or two mined by the forward and back resistances of said diodes. The video input 10 is fed into a cathode follower which comprises the remaining triode within tube 6SN7 or as designated in Fig. 5, tube V4. L

The initial value of the clip level 111 can be set manually by changing the width of the output of clip level multivibrator 18. This adjustment is usually made by observing the number of quantized noise pulses 113 on Vthe slowed-downfvideo plan position indicator or, as abbreviated, P.'P.I. (not shown). Because of the long time ,constant in theintegrator 20, this process is long compared to previous attempts 'to automatically regulate a vradar system for videonoise. However, the adjustment only need be made when a major change in receiver gain is made, and'with practice the time constant can be substantially reduced. Not much else can be done to reduce the time constant of integration because of the high gain necessitated by feedback path.V The presence of a target or 4 piece of ground clutter in the gate 14 would raise the clip 150K ohms resistors 52 and 53, placed'in parallel, can Y be used for the load resistance because of the load effect of integrator 20. The output coupling capacitor 54, is relatively large (e.g. 0.15pf. and 400 volts), in order to overcome the interaction of the elements of stage 19. The negative output of multivibrator 18 is not large enoughy to cut off the amplifier of stage 19 due to its high plate supply, and since positive pulses are required for integration to provide the correct polarity for the clipper 11, it was necessary to add the inverter of stage 19 to operate on the large positive output from multivibrator 18.

The 60G-volt plate voltage of the ampliiier of stage 19 necessitates the use of a 6SN7-GTA tube, which is designated in Fig. 5 as V2. However, since the rated maximum heater cathode voltage is 200volts, the heater 55 is placed at -300 D.C. volts. Hence, the cathode of the inverter of stage19 must also be at negative voltage of `l05volts,Y as shown at 56, and the inverter grid bias must beadjusted to #-300 volts, as shown at 57. Direct coupling must be used between multivibrator 18 and the inverter of stage 19 because capacitor coupling blocks level 111 too much if the time constant were substantiallyl reduced. Y y

Other tubes, voltage magnitudes and circuit components may be used in place of those shown in Fig. 5. The specie components as shown and described in the present embodiment are for illustrative purposes only, and it is not intended that my invention be limited thereto.

I claim: l l y l. Computer control circuitry including, in combination, a signal input circuit, means for clipping the voltage peaks of said signal input circuit, means for converting the output of said clipping meansinto digital pulses, said convertingmeans vcomprising alflip-op component triggered by said voltage peaks, a pulser for generating timing mark pulses at predetermined intervalsra gate component opened by the triggered flip-flop component to permit the next'timing mark pulse through said gate component, means for delaying the output of said gate component for a predetermined interval, means for re-` generating the delayed output of said gate component wherein the output digital pulses of said regenerating means is transmitted to actuate said means for controlling the clip level of said clipping means, and said regenerating means also serving to reset said flip-flop component forsubsequent triggering action.

2L The computer control circuitry as defined in claim 1,'

" and at predetermined intervals, said gate means beingoperative to open to-one of said output digital pulses lof said regenerating means if said lastnamed pulse is in syncbronism with the pulse generated by said gate delay means, whereby the output of said gate means is fed back to control the clip level of said clipping means.

3. The computer control circuitry as defined in claim 2 and further comprising a clip level delay means triggered by the output pulses of said gate means for generating pulses at predetermined intervals, means for inverting and amplifying the output pulses or" said clip level delay means, means for integrating the output of said inverting and amplifying means into a D.C. voltage wherein said integrated DC. voltage is fed -to control the clip level of said clipping means maintaining substantial constancy of signal content.

4, An automatic clip control circuit for a radar system including video input signal means and visual indicating means, comprising means for clipping the peaks of said video input signals, means for converting the output of said clipping means into quantized digital pulses, means for feeding said quantized digital pulses to said indicating means, means for generating radar trigger pulses, gate delay means for generating pulses of predetermined duration and spacing actuated by and in accordance with the frequency of said radar trigger pulses, means Vfor gating said quantized digital pulses when a pulse from said gate relay means is in synchronism with a quantized digital pulse means for inverting and amplifying the output of said gate means, and means for integrating the output of said inverted and amplied pulse wherein a DC. voltage is generated to be fed back to said clipping means to regulate the clip level of subsequenlty received video input signals and maintain the contentV of said quantized video pulses substantially constant.

5. Apparatus lfor maintaining the quantized noise of video signals received by a radar system substantially constant regardless of variations of the video noise level, comprising means for clipping the peaks of said received video signals, means yfor converting the output of said clip video signals into `digital pulses, means for gating said digital pulses in accordance with delayed radar trigger input signals, means for inverting and amplifying the output of the gating raction and integrating the inverted axnd amplified signal 'wherein a D.C. voltage is generated, and means for feeding back said D.C. voltage to regulate the input video signals to maintain substantial signal input constancy. l

References Cited in the le of this patent UNITED STATES PATENTS 2,144,995 Pulvari-Pulvermacher lan. 24, 1939 2,353,018 Duke July k4, 1944 2,490,530v Loughlin Dec. 6, 1949 2,502,454 Grieg Apr. 4, 1950 i FOREIGN PATENTS 586,284 l Great Britain V Mar. 13, 1947 

